We can introduce a cache which is a fast access memory which sits between the CPU and main memory, but it has a smaller capacity. Cache is also **volatile memory**, so in case of an outage, data in the cache is lost.

digraph {
	rankdir=LR
	node[shape=box]
	MM[label="MM (10ns)"]
	CACHE[label="Cache (1ns)"]
	CPU->CACHE [dir=both]
	CACHE->MM [dir=both]
}