3. Complement arithmetic

Complement arithmetic

Complement addition

Given 1’s or 2’s complement operands, we can perform the same bit operations as we did with unsigned numbers to find the correct result. Although, at the end, we add the carry-out bit to the final result.

$$\begin{array}{r}010100\\ +\underline{110100}\\ 1001010\\ +\underline{1}\\ 001011\end{array}$$

Subtraction

Similarly to signed-magnitude subtraction, we treat the second operand as if it was a negative number. $a-b=a+(-b)$ and perform addition instead.

Overflow

Two’s complement overflow occurs when the carry-in to the most-significant bit is not equal to the carry-out.

$$\begin{array}{r}01101\\ +\underline{00100}\\ 10001\end{array}$$

In this case, the carry-in to the most significant bit is $1$ while the carry-out of the MSB is $0$. Hence we’ve experienced an overflow.

$$\begin{array}{r}01101\\ +\underline{10110}\\ 100011\end{array}$$

In this case, the carry-in to the MSB is the same as the carry-out ($1$). Hence, we just discard the carry-out and get the result $00011$.

Complement multiplication / division

We can take one of two approaches:

• Using a naive approach:
  • Find the magnitude of both operands.
  • Perform the operation as if they were unsigned.
  • Convert result to negative if the operands had different signs.
• Using a specialised algorithm: Booth’s algorithm for two’s complement multiplication These are not on the exam.