Archive Notes

module4ccs1cs1

120 items with this tag.

Jun 18, 2026
Week 3. Binary 2
Jun 18, 2026
Week 4. Binary 3
Jun 18, 2026
Week 5. Assembly 1
Jun 18, 2026
Week 6. Assembly 2
Jun 18, 2026
Week 7. ISAs and Pipelining
- typesummary
- module4ccs1cs1
Jun 18, 2026
4CCS1CS1 Computer Systems 1
- module4ccs1cs1
Jun 18, 2026
Week 1. Course Introduction
- typesummary
- module4ccs1cs1
Jun 18, 2026
Week 2. Binary 1
Jun 18, 2026
7. Replacement policies
- module4ccs1cs1
Jun 18, 2026
Tutorial Work
- module4ccs1cs1
Jun 18, 2026
2. Signed-magnitude arithmetic
Jun 18, 2026
3. Complement arithmetic
Jun 18, 2026
1. Fixed-point or Floating-point
Jun 18, 2026
2. IEEE-754 format
Jun 18, 2026
202110201103
Jun 18, 2026
3. Arithmetic with IEEE-754 format
Jun 18, 2026
4. Range and precision
Jun 18, 2026
5. Accuracy
Jun 18, 2026
1-2. Computer components
Jun 18, 2026
3-4. MARIE
Jun 18, 2026
Tutorial Work
Jun 18, 2026
1. Instruction processing and interrupts
Jun 18, 2026
2. Tracing a simple MARIE program
Jun 18, 2026
3. Assemblers
Jun 18, 2026
4. Extending the MARIE instruction set
Jun 18, 2026
5. Sample programming constructs
Jun 18, 2026
Tutorial Work
Jun 18, 2026
1. Designing ISAs
- module4ccs1cs1
Jun 18, 2026
2. Endianness
- module4ccs1cs1
Jun 18, 2026
3. Register Architectures
- module4ccs1cs1
Jun 18, 2026
4. Instruction Types
- module4ccs1cs1
Jun 18, 2026
5. Addressing
- module4ccs1cs1
Jun 18, 2026
6. Pipelining
- module4ccs1cs1
Jun 18, 2026
Tutorial Work
- module4ccs1cs1
Jun 18, 2026
1. What is benchmarking
- module4ccs1cs1
Jun 18, 2026
2. Benchmark examples
- module4ccs1cs1
Jun 18, 2026
3. RISC vs CISC
- module4ccs1cs1
Jun 18, 2026
4. Branch optimisations and code optimisations
- module4ccs1cs1
Jun 18, 2026
5. Caching
- module4ccs1cs1
Jun 18, 2026
1. Memory addresses
- module4ccs1cs1
Jun 18, 2026
2. Memory hierarchy
- module4ccs1cs1
Jun 18, 2026
3. Effective access time
- module4ccs1cs1
Jun 18, 2026
4. Direct-mapped cache
- module4ccs1cs1
Jun 18, 2026
5. Fully-associative cache
- module4ccs1cs1
Jun 18, 2026
6. Set-associative cache
- module4ccs1cs1
Jun 18, 2026
Word-addressable memory
Jun 18, 2026
1. What is a computer system
- module4ccs1cs1
Jun 18, 2026
2. The computer hierarchy
- module4ccs1cs1
Jun 18, 2026
3. How to measure a computer system
- module4ccs1cs1
Jun 18, 2026
4. The von Neumann model
- module4ccs1cs1
Jun 18, 2026
1. Virtual Memory
- module4ccs1cs1
Jun 18, 2026
2. Segmentation
- module4ccs1cs1
Jun 18, 2026
3. External fragmentation
- module4ccs1cs1
Jun 18, 2026
4. Paging
- module4ccs1cs1
Jun 18, 2026
5. Internal fragmentation
- module4ccs1cs1
Jun 18, 2026
6. EAT and TLB
- module4ccs1cs1
Jun 18, 2026
1. Overview
Jun 18, 2026
2. Positional number systems
Jun 18, 2026
3. Base conversions
Jun 18, 2026
4. Fractional components
Jun 18, 2026
5. Signed-magnitude binary
Jun 18, 2026
6. One's complement binary
Jun 18, 2026
7. Two's complement binary
Jun 18, 2026
8. Hexadecimal
Jun 18, 2026
9. Why binary
Jun 18, 2026
1. Unsigned arithmetic
Jun 18, 2026
Temporal locality
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Two's complement
Jun 18, 2026
Spacial locality
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Stack architecture
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Status (register)
Jun 18, 2026
Synthetic benchmark
- module4ccs1cs1
- typedefinition
Jun 18, 2026
System Bus
Jun 18, 2026
System clock
Jun 18, 2026
Sequential locality
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Signed-magnitude binary
Jun 18, 2026
Radix notation
Jun 18, 2026
Register Transfer Language
Jun 18, 2026
Register
Jun 18, 2026
Postfix notation
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Prefix notation
Jun 18, 2026
Program Counter (register)
Jun 18, 2026
Most significant bit
Jun 18, 2026
Nibble
Jun 18, 2026
Non-maskable Interrupts
Jun 18, 2026
One's complement
Jun 18, 2026
Little-endian
- module4ccs1cs1
- typedefinition
Jun 18, 2026
MARIE ISA
Jun 18, 2026
Maskable Interrupt
Jun 18, 2026
Memory Buffer Register
Jun 18, 2026
Indirect addressing
Jun 18, 2026
Instruction Register
Jun 18, 2026
Instruction Set Architecture
Jun 18, 2026
Instruction-level pipelining
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Interrupt
Jun 18, 2026
General purpose register architecture
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Geometric mean
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Hexadecimal
Jun 18, 2026
IO Subsystem
Jun 18, 2026
Effective address
- module4ccs1cs1
- typedefinition
Jun 18, 2026
FDE Cycle
Jun 18, 2026
Datapath
Jun 18, 2026
Decimal system
Jun 18, 2026
Direct addressing
Jun 18, 2026
Computer Memory
Jun 18, 2026
Computer architecture
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Computer organisation
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Control Unit
Jun 18, 2026
Byte ordering
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Byte-addressable memory
Jun 18, 2026
Byte
Jun 18, 2026
Central Processing Unit
Jun 18, 2026
Assembler
Jun 18, 2026
Big-endian
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Binary
Jun 18, 2026
Accumulator (register)
Jun 18, 2026
Accumulator architecture
- module4ccs1cs1
- typedefinition
Jun 18, 2026
Arithmetic Logic Unit
Jun 18, 2026
Random Access Memory
Jun 18, 2026
Word (Memory)

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