1-2. Computer components

Computer components

The CPU

Central Processing Unit

The Central Processing Unit (CPU) is what drives the fetch, execute, decode cycle. It consists of two principle parts: ?

• Datapath

  The datapath consists of an [[Arithmetic Logic Unit]] and [[Register|registers]] that are connected to each other, and to memory, by a **data bus**.

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• Control Unit

  The control unit sends timing and control signals to activate various components within the CPU to perform sequenced operations.

  A control unit determines what actions should be carried out according to the values in the [[Program Counter (register)|Program Counter]] and a [[Status (register)]].

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Memory

Computer Memory

Computer memory consists of a linear array of addressable storage cells.

Word (Memory)

The storage cells of memory are of a regular and fixed size known as a word. In exams, take a word to be $16\text{ bits}$.

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• Word-addressable memory

  Memory is commonly word-addressable: processor identifies a particular [[Word (Memory)|word]] when it needs to read and write data

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• Byte-addressable memory

  Memory can be byte-addressable: processor is able to address different sizes of memory compared to the word size

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• Modern PC architectures have a word size of 32-bit or 64-bit.

Random Access Memory

Random Access Memory (RAM) stores actively running programs and any data currently in use.

RAM chips are often referred to in terms of length $\times$ width.

• If the word size is $16\text{ bits}$, then a $4\text{M}\times 16$ RAM chip gives us $4\times 2^{20}$ 16-bit memory locations.

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I/O

IO Subsystem

The I/O (input/output) subsystem is used by a computer to interact with the outside world.

I/O devices can be connected to the CPU through various interfaces: ?

• Memory mapped: the device behaves like main memory from the point of view of the CPU
• Instruction mapped: where the CPU has specific instructions for controlling the device

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System Bus

System Bus

A bus is an array of wires, that simultaenously convery convey a single bit along each line.

Two types of buses are commonly found in computer systems: ?

• Point-to-point: bus is connected to just two components
• Multi-point: many components can access the one bus

The system bus consists of: ?

• Data lines: Convey bits from one device to another.
• Control lines: Determine the direction of data flow and when each device can access the bus.
• Address lines: Determine the data source or destination location.

A typical multi-point bus configuration looks like:

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Clock

System clock

A system clock is used to synchronise all internal components, the clock outputs a steady high-frequency signal.

• A fixed number of clock cycles are required to carry each data movement or computational operation.

• Clock frequency

  The clock frequency, measured in Hertz, determines the speed with which all operations are carried out. Clock cycle time is the reciprocal of frequency.

  $$t_c=\frac{1}{f_c}$$

  A $800\text{ MHz}$ clock has a cycle time of $t_c=1.25\text{ ns}$.

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• The CPU time required to run a program is given by the general performance equation: $$T=\frac{\text{seconds}}{\text{program}}=\frac{\text{instructions}}{\text{program}}\times \frac{\text{avg. cycles}}{\text{instruction}}\times \frac{\text{seconds}}{\text{cycle}}$$ We can improve CPU throughput if we reduce:
  1. Number of instructions per program.
  2. Number of cycles per instruction.
  3. Number of seconds per clock cycle.

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Interrupts

Interrupt

An interrupt allows us to alter the normal flow of execution of a program when an event of higher priority occurs. They can be triggered by different sources:

• I/O requests
• Arithmetic errors (e.g. div 0)
• Encountering invalid instructions

Each interrupt is associated with a procedure (Interrupt Service Routine) that directs the actions of the CPU to handle the events.

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3-4. MARIE

MARIE

Machine Architecture that is Really Intuitive and Easy

Specification

• Binary, two’s complement data representation
• Stored program, fixed word length data and instructions
• $4\text{K}$ words of word-addressable main memory
• $16\text{-bit}$ word size
• $16\text{-bit}$ instructions ($4$ for op code, $12$ for address)
• $16\text{-bit}$ ALU
• Seven registers for control and data movement

Architecture

Below is an overview of the MARIE architecture.

The ratio of address, control and data lines varies between computer systems.

• More devices on the bus mean we want more control lines.
• More addresses in memory mean we want more address lines.
• Larger word size, means more data lines.

Bus

All of MARIE’s registers are connected with each other and with main memory through a common data bus.

• Each device on the bus is identified by a unique number. This number is set on the control lines whenever the corresponding device is required to carry out an operation.
• Separate connections are also provided between the following registers:
  • ACC and MBR
  • ALU with the ACC and MBR

MARIE ISA

Instruction Set Architecture

A computer’s instruction set architecture (ISA) specifies the format of its instructions and the primitive operations that the machine can perform.

• The ISA is an interface between a computer’s hardware and its software.
• Some ISAs include hundreds of different instructions for processing data and controlling program execution.

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MARIE ISA

MARIE’s ISA contains thirteen instructions.

Hex	Binary	Instruction	Meaning
$0$	$0000$	JnS X	Jump and Store: Stores PC at address $X$ and jumps to $X+1$.
$1$	$0001$	Load X	Load contents of address X into ACC
$2$	$0010$	Store X	Store the contents of the ACC at address X
$3$	$0011$	Add X	Add the contents of address X to the ACC
$4$	$0100$	Subt X	Subtract the contents of address X from the ACC
$5$	$0101$	Input	Input a value from input device into the ACC
$6$	$0110$	Output	Output the value in the ACC to output device
$7$	$0111$	Halt	Terminate the program
$8$	$1000$	Skipcond C	Skip the next instruction on condition (C), if $C$ is: - $000$: Skips if $AC<0$ - $400$: Skips if $AC=0$ - $800$: Skips if $AC>0$
$9$	$1001$	Jump X	Load the value of X into PC
$A$	$1010$	Clear	Set the value of ACC to $0$.
$B$	$1011$	AddI X	Use the value at $X$ as the actual address of the data operand to add to ACC
$C$	$1100$	JumpI X	Uses the value at $X$ as the address to jump to
$D$	$1101$	LoadI X	Loads value from indirect address to ACC.
$E$	$1110$	StoreI X	Stores value in ACC at the indirect address.

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Register Transfer Language

Register Transfer Language

Each of MARIE’s instructions consist of a sequence of micro-operations: data movements between registers as well as arithmetic & logical operations.

The exact sequence of micro-operations that are carried out by an instruction can be specified using the register transfer language (RTL).

We use the notation $M[X]$ to indicate the actual data value stored in a memory location $X$, and $\leftarrow$ to indicate the transfer of bytes to a register or memory location.

Example RTL for the LOAD X instruction:

$$\begin{array}{rl}MAR& \leftarrow X\\ MBR& \leftarrow M[MAR]\\ AC& \leftarrow MBR\end{array}$$

Example RTL for the ADD X instruction:

$$\begin{array}{rl}MAR& \leftarrow X\\ MBR& \leftarrow M[MAR]\\ AC& \leftarrow AC+MBR\end{array}$$

Example RTL for the JUMP X instruction:

$PC\leftarrow X$

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