1. Instruction processing and interrupts

Instruction processing

FDE Cycle

The fetch-decode-execute cycle is the series of steps that a computer carries out when it runs a program.

• Fetch: The control unit fetches the next instruction from memory (this data comes through von Neumann bottleneck) and updates the program counter to determine where the next instruction is located. We first have to fetch an instruction from memory and place it into the IR.
• Decode: Translate the instruction into signals that the ALU can interpret and execute (it is decoded to determine what needs to be done next).
• Execute: This takes two steps.
  • Load any required data into the CPU registers. If a memory value is involved in the operation, it is retrieved and placed into the MBR.
  • Execute the instruction, placing the results in registers or memory.

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Interrupts

All computers provide a way of interrupting the FDE cycle, this is through the use of interrupts. Interrupts occur when:

• A user break (e.g. CTRL + C) is issued.
• I/O is required by the user or a program.
• A critical error occurs.

Interrupt

An interrupt allows us to alter the normal flow of execution of a program when an event of higher priority occurs. They can be triggered by different sources:

• I/O requests
• Arithmetic errors (e.g. div 0)
• Encountering invalid instructions

Each interrupt is associated with a procedure (Interrupt Service Routine) that directs the actions of the CPU to handle the events.

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Interrupt processing involves adding another step to the FDE cycle.

Processing an interrupt

To process an interrupt, a series of steps occur once one is detected: ?

1. Save data stored in registers into memory.
2. Look up Interrupt Service Routine address in interrupt table.
3. Place ISR address in PC.
4. Execute instructions of ISR.
5. Restore data to registers from memory.
6. Return to the FDE cycle.

For general-purpose computers, it is common to disable all interrupts during the time in which an interrupt is being processed. Typically, this is achieved by setting a bit in the Status (register).

• Interrupts that are ignored in this case are called Maskable Interrupt.
• Non-maskable Interrupts are those that must be processed in order to keep the system in a stable condition.

Interrupts are generally useful in processing I/O. (although interrupt-driven I/O is complicated) MARIE uses a modified form of programmed I/O:

• All output is placed in an output register, $OUT$.
• The CPU polls the input register, $IN$, until input is sensed.
• Whenever this happens, the value in the register is copied into the accumulator, $AC\leftarrow IN$.